1. Field of the Invention
The present invention relates to a cache memory, a computer system and a memory access method.
2. Related Art
In a computer system, correct processing cannot be continued if data stored in the main memory is destroyed, and influence of the data destruction is avoided by restoring the destroyed data using an error correcting code (ECC).
Data destruction is caused by various factors such as cosmic rays and heat. For example, in a memory such as an MRAM, a phenomenon called read disturbance, in which stored values are inverted, occurs accompanying a data reading operation, and thereby data is destroyed, though the occurrence probability is low. Since the read disturbance is a physical phenomenon which probabilistically occurs, it is difficult to suppress the probability to zero. Furthermore, when the reading voltage is raised to increase the access speed, the occurrence probability of the read disturbance becomes higher.
Phenomena similar to the read disturbance of an MRAM also occur in various kinds of non-volatile memories, such as an ReRAM, an FeRAM and a flash memory. Therefore, it is necessary to take measures therefor, such as use of an ECC.
Generally, in a computer system, there is provided a cache memory, which is a high-speed storage device, between a main memory and a processor and data frequently used are stored in the cache memory to reduce accesses to the low-speed main memory and speed up processing. Data read from the main memory is stored into the cache memory. Furthermore, data rewritten by the processor is written back to the main memory (see, for example, JP-A 8-137748(KOKAI)).
Conventionally, when data read from the main memory is corrected with an ECC, the processor often does not perform any special processing because it can obtain correct data which has been corrected. In some cases, it is communicated to the processor by interruption that the data correction with an ECC has occurred, and, in response thereto, the operating system on the processor performs processing, such as for gathering statistic information and for preventing the area on the main memory where the corrected data has been stored from being used.
In the case of having corrected data destruction which probabilistically occurs, such as read disturbance of an MRAM, with an ECC, there is a possibility that, when data at the same address is read next, different data is further destroyed. Therefore, it is necessary to certainly write back the data corrected with the ECC from the cache memory to the main memory.
However, in the conventional computer system described above, since it is notified by interruption that correction has been performed with an ECC, and the operating system operates and performs necessary processing, it is not ensured that correct data which has been corrected with the ECC remains in the cache memory at the time of the processing. For example, there is a possibility that the data corrected with the ECC is driven out of the cache memory by data read later and it disappears. If the data does not remain in the cache memory, it is read again from the main memory, which causes a problem that the processing speed is decreased.